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HT1670 128 32 lcd controller for i/o mcu rev. 1.00 1 september 16, 2003 features operating voltage: 2.7v~5.2v built-in 32khz rc oscillator external 32.768khz crystal oscillator or 32khz fre - quency source input standby current: <1 a at 3v, <2 aat5v internal resistor type: 1/6 bias or 1/5 bias, 1/32 duty, and 1/16 duty three selectable lcd frame frequencies: 64hz, 89hz or 170hz max. 128 32 patterns, 128 segments and 32 com - mons 144 segments and 16 commons selectable by com - mand method built-in bit-map display ram: 4096 bits (=128 32 bits) built-in internal resistor type bias generator six-wire interface (four data wires) eight kinds of time base/wdt selection time base or wdt overflow output r/w address auto increment built-in buzzer driver (2khz/4khz) power down command reduces power consumption software configuration feature data mode and command mode instructions three data accessing modes provides vlcd pin to adjust lcd operating voltage and max. vlcd voltage up to 7v provides three kinds of bias current programming control of tn-type and stn-type lcds 208-pin qfp package general description HT1670 is a peripheral device specially designed for i/o type mcu used to expand the display capability. the max. display segment of the device are 4096 patterns (128 segments and 32 commons). it also supports four data bits interface, buzzer sound, watchdog timer or time base timer functions. the HT1670 is a memory mapping and multi-function lcd controller. since the HT1670 can control tn-type (twisted nematic) or stn-type (super twisted nematic) lcds. the software configuration feature of the HT1670 make it suitable for multiple lcd applications including lcd modules and display subsystems. only six lines (cs ,wr , db0~db3) are required for the interface between the host controller and the HT1670. applications leisure products games personal digital assistant cellular phone global positioning system consumer electronics
block diagram pin assignment HT1670 rev. 1.00 2 september 16, 2003

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pad assignment chip size: 4950 5750 ( m) 2 * the ic substrate should be connected to vss in the pcb layout artwork. pad coordinates unit: m pad no. x y pad no. x y pad no. x y 1 2343.20 2715.30 62 848.60 2594.80 123 2343.05 1090.25 2 2343.20 2581.20 63 713.20 2594.80 124 2343.05 1190.25 3 2343.20 2461.20 64 567.90 2594.80 125 2343.05 1290.25 4 2343.20 2341.20 65 432.30 2594.80 126 2343.05 1390.25 5 2343.20 2221.20 66 290.20 2594.90 127 2343.05 1490.25 6 2343.20 2101.20 67 156.70 2599.30 128 2343.05 1590.25 7 2343.20 1990.25 68 18.50 2599.30 129 2343.05 1690.25 8 2343.20 1890.25 69 119.80 2666.95 130 2343.05 1790.25 9 2343.20 1790.25 70 209.15 2531.95 131 2343.05 1890.25 HT1670 rev. 1.00 3 september 16, 2003 ; # / # < % 3 $ 8 7 ' 4 : 9 % # % % % 3 % $ % 8 % 7 % ' % 4 % : % 9 3 # 3 % 3 3 3 $ 3 8 3 7 3 ' 3 4 3 : 3 9 $ # $ % $ 3 $ $ $ 8 $ 7 $ ' $ 4 $ : $ 9 8 # 8 % 8 3 8 $ 8 8 8 7 8 ' 8 4 8 : 8 9 7 # 7 % 7 3 7 $ 7 8 7 7 7 ' 7 4 7 : 7 9 ' # ' % ' 3 ' $ ' 8 ' 7 ' ' ' 4 ' : ' 9 4 # 4 % 4 3 4 $ 4 8 4 7 4 ' 4 4 4 : 4 9 : # : % : 3 : $ : 8 : 7 % $ : % $ 4 % $ ' % $ 7 % $ 8 % $ $ % $ 3 % $ % % $ # % 3 9 % 3 : % 3 4 % 3 ' % 3 7 % 3 8 % 3 $ % 3 3 % 3 % % 3 # % % 9 % % : % % 4 % % ' % % 7 % % 8 % % $ % % 3 % % % % % # % # 9 % # : % # 4 % # ' % # 7 % # 8 % # $ % # 3 % # % % # # 9 9 9 : 9 4 9 ' 9 7 9 8 9 $ 9 3 9 % 9 # : 9 : : : 4 : ' % $ 9 % 8 # % 8 % % 8 3 % 8 $ % 8 8 % 8 7 % 8 ' % 8 4 % 8 : % 8 9 % 7 # % 7 % % 7 3 % 7 $ % 7 8 % 7 7 % 7 ' % 7 4 % 7 : % 7 9 % ' # % ' % % ' 3 % ' $ % ' 8 % ' 7 % ' ' % ' 4 % ' : % ' 9 % 4 # % 4 % % 4 3 % 4 $ % 4 8 % 4 7 % 4 ' % 4 4 % 4 : % 4 9 % : # % : % ! & : ' ! & : 4 ! & : : ! & : 9 ! & 9 # ! & 9 % ! & 9 3 ! & 9 $ ! & 9 8 ! & 9 7 ! & 9 ' ! & 9 4 ! & 9 : ! & 9 9 ! & % # # ! & % # % ! & % # 3 ! & % # $ ! & % # 8 ! & % # 7 ! & % # ' ! & % # 4 ! & % # : ! & % # 9 ! & % % # ! & % % % ! & % % 3 ! & % % $ ! & % % 8 ! & % % 7 ! & % % ' ! & % % 4 ! & % % : ! & % % 9 ! & % 3 # ! & % 3 % ! & % 3 3 ! & % 3 $ ! & % 3 8 ! & % 3 7 ! & % 3 ' ! & % 3 4 $ % $ # 3 9 3 : 3 4 3 ' 3 7 3 8 3 $ 3 3 3 % 3 # % 9 % : % 4 % ' ! # % 3 $ , ! ! ! " ! , , " + * *
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pad no. x y pad no. x y pad no. x y 10 2343.20 1690.25 71 378.85 2553.20 132 2343.05 1990.25 11 2343.20 1590.25 72 525.35 2594.90 133 2343.05 2101.20 12 2343.20 1490.25 73 660.75 2594.90 134 2343.05 2221.20 13 2343.20 1390.25 74 820.45 2594.90 135 2343.05 2341.20 14 2343.20 1290.25 75 968.65 2594.90 136 2343.05 2461.20 15 2343.20 1190.25 76 1115.65 2594.90 137 2343.05 2581.20 16 2343.20 1090.25 77 1263.85 2594.90 138 2343.05 2715.30 17 2343.20 990.25 78 1410.85 2594.90 139 2095.70 2715.30 18 2343.20 890.25 79 1581.55 2531.90 140 1959.25 2715.30 19 2343.20 790.25 80 1707.05 2702.70 141 1859.25 2715.30 20 2343.20 690.25 81 1807.05 2702.70 142 1759.25 2715.30 21 2343.20 590.25 82 1907.05 2702.70 143 1659.25 2715.30 22 2343.20 490.25 83 2013.05 2702.70 144 1559.25 2715.30 23 2343.20 390.25 84 2123.05 2702.70 145 1459.25 2715.30 24 2343.20 290.25 85 2233.05 2702.70 146 1359.25 2715.30 25 2343.20 190.25 86 2343.05 2702.70 147 1259.25 2715.30 26 2343.20 90.25 87 2343.05 2571.70 148 1159.25 2715.30 27 2343.20 9.75 88 2343.05 2451.70 149 1059.25 2715.30 28 2343.20 109.75 89 2343.05 2331.70 150 959.25 2715.30 29 2343.20 209.75 90 2343.05 2215.05 151 859.25 2715.30 30 2343.20 309.75 91 2343.05 2115.05 152 759.25 2715.30 31 2343.20 409.75 92 2343.05 2015.05 153 659.25 2715.30 32 2343.20 509.75 93 2343.05 1915.05 154 559.25 2715.30 33 2343.20 609.75 94 2343.05 1815.05 155 459.25 2715.30 34 2343.20 709.75 95 2343.05 1715.05 156 359.25 2715.30 35 2343.20 809.75 96 2343.05 1609.75 157 259.25 2715.30 36 2343.20 909.75 97 2343.05 1509.75 158 159.25 2715.30 37 2343.20 1009.75 98 2343.05 1409.75 159 59.25 2715.30 38 2343.20 1109.75 99 2343.05 1309.75 160 40.75 2715.30 39 2343.20 1209.75 100 2343.05 1209.75 161 140.75 2715.30 40 2343.20 1309.75 101 2343.05 1109.75 162 240.75 2715.30 41 2343.20 1409.75 102 2343.05 1009.75 163 340.75 2715.30 42 2343.20 1509.75 103 2343.05 909.75 164 440.75 2715.30 43 2343.20 1609.75 104 2343.05 809.75 165 540.75 2715.30 44 2343.20 1709.75 105 2343.05 709.75 166 640.75 2715.30 45 2343.20 1809.75 106 2343.05 609.75 167 740.75 2715.30 46 2343.20 1909.75 107 2343.05 509.75 168 840.75 2715.30 47 2343.20 2009.75 108 2343.05 409.75 169 940.75 2715.30 48 2343.20 2109.75 109 2343.05 309.75 170 1040.75 2715.30 49 2343.20 2209.75 110 2343.05 209.75 171 1140.75 2715.30 50 2343.20 2309.75 111 2343.05 109.75 172 1240.75 2715.30 51 2343.20 2409.75 112 2343.05 9.75 173 1340.75 2715.30 52 2343.20 2509.75 113 2343.05 90.25 174 1440.75 2715.30 53 2343.20 2609.75 114 2343.05 190.25 175 1540.75 2715.30 54 1850.15 2702.70 115 2343.05 290.25 176 1640.75 2715.30 55 1750.15 2702.70 116 2343.05 390.25 177 1740.75 2715.30 56 1650.15 2702.70 117 2343.05 490.25 178 1840.75 2715.30 57 1550.15 2702.70 118 2343.05 590.25 179 1940.75 2715.30 58 1450.15 2702.70 119 2343.05 690.25 180 2040.75 2715.30 59 1273.50 2594.80 120 2343.05 790.25 181 2173.20 2715.30 60 1130.90 2594.80 121 2343.05 890.25 61 995.50 2594.80 122 2343.05 990.25 HT1670 rev. 1.00 4 september 16, 2003
pad description pad no. pad name i/o description 1~42 96~181 seg86~seg127 seg0~seg85 o lcd segment outputs 43~58 80~95 com31~com16 com0~com15 o lcd common outputs, under 144 16 command mode, com16~com31 will share to seg128~seg143. com31/seg128, com30/seg129, com29/ seg130....., com18/seg141, com17/seg142, com16/seg143 59 cs i chip selection input with pull-high resistor. when the cs is logic high, the data and command read from or write to the HT1670 are disabled. the serial interface circuit is also reset. but if the cs is at a logic low level and is input to the cs pad, the data and command transmission between the host controller and the HT1670 are all enabled. 60 rd i read clock input with pull-high resistor. data in the ram of the HT1670 are clocked out on the falling edge of the rd signal. the clocked out data will ap - pear on the data line. the host controller can use the next rising edge to latch the clocked out data. 61 wr i write clock input with pull-high resistor. data on the data line are latched into the HT1670 on the rising edge of the wr signal. 62~65 db0~db3 i/o parallel data input/output with a pull-high resistor 66 vss negative power supply for logic circuit, ground 67 68 osci osco i o the osci and osco pads are connected to a 32.768khz crystal in order to generate a system clock. if the system clock comes from an external clock source, the external clock source should be connected to the osci pad. but if an on-chip rc oscillator is selected, the osci and osco pads can be left open. 69 vdd positive power supply for logic circuit 70, 79 vlcd i power supply for lcd driver circuit 71 irq o time base or watchdog timer overflow flag, nmos open drain output. 72, 73 bz, bz o 2khz or 4khz frequency output pair (tristate output buffer) 74~78 t1~t4, t000 i not connected absolute maximum ratings supply voltage ...........................v ss 0.3v to v ss +5.5v storage temperature ............................ 50 cto125 c input voltage.............................v ss 0.3v to v dd +0.3v operating temperature........................... 25 cto75 c note: these are stress ratings only. stresses exceeding the range specified under absolute maximum ratings may cause substantial damage to the device. functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil - ity. HT1670 rev. 1.00 5 september 16, 2003
d.c. characteristics ta=25 c symbol parameter test conditions min. typ. max. unit v dd conditions v dd operating voltage 2.7 5.2 v i dd1 operating current 3v no load/lcd on on-chip rc oscillator 150 250 a 5v 250 370 a i dd2 operating current 3v no load/lcd on crystal oscillator 135 200 a 5v 200 300 a i dd11 operating current 3v no load/lcd off on-chip rc oscillator 15 30 a 5v 50 70 a i dd22 operating current 3v no load/lcd off crystal oscillator 210 a 5v 310 a i stb standby current 3v no load, power down mode 1 a 5v 2 a v il input low voltage 3v db0~db3, wr ,cs ,rd 0 0.6 v 5v 0 1.0 v v ih input high voltage 3v db0~db3, wr ,cs ,rd 2.4 3v 5v 4.0 5v i ol1 bz, bz , irq sink current 3v v ol =0.3v 1.2 2.5 ma 5v v ol =0.5v 36 ma i oh1 bz, bz source current 3v v oh =2.7v 1.8 0.9 ma 5v v oh =4.5v 2 4 ma i ol2 db0~db3 sink current 3v v ol =0.3v 1.2 2.5 ma 5v v ol =0.5v 36 ma i oh2 db0~db3 source current 3v v oh =2.7v 1.8 0.9 ma 5v v oh =4.5v 4 2 ma i ol3 lcd common sink current 3v v ol =0.3v 80 160 a 5v v ol =0.5v 180 360 a i oh3 lcd common source current 3v v oh =2.7v 80 40 a 5v v oh =4.5v 180 90 a i ol4 lcd segment sink current 3v v ol =0.3v 50 100 a 5v v ol =0.5v 120 240 a i oh4 lcd segment source current 3v v oh =2.7v 60 30 a 5v v oh =4.5v 140 70 a r ph pull-high resistor 3v db0~db3, wr ,cs ,rd 150 250 350 k 5v 60 125 180 k HT1670 rev. 1.00 6 september 16, 2003
a.c. characteristics ta=25 c symbol parameter test conditions min. typ. max. unit v dd conditions f sys1 system clock 3v on-chip rc oscillator 22 32 40 khz 5v 24 32 40 khz f sys2 system clock 3v crystal oscillator 32.768 khz 5v 32.768 khz f sys3 system clock 3v external clock source 32 khz 5v 32 khz f lcd1 lcd frame frequency 3v on-chip rc oscillator 61/117 89/170 111/213 hz 5v 61/117 89/170 111/213 hz f lcd2 lcd frame frequency 3v crystal oscillator 64 hz 5v 64 hz f lcd3 lcd frame frequency 3v external clock source 64 hz 5v 64 hz t com lcd common period n: number of com n/f lcd sec f clk1 4-bit data clock (wr pin) 3v duty cycle 50% 150 khz 5v 300 khz f clk2 4-bit data clock (rd pin) 3v duty cycle 50% 75 khz 5v 150 khz t cs 4-bit interface reset pulse width (figure 3) cs 250 ns t clk wr ,rd input pulse width (figure 1) 3v write mode 3.34 s read mode 6.67 5v write mode 1.67 s read mode 3.34 t r ,t f rise/fall time serial data clock width (figure 1) 3v 120 ns 5v t su setup time for db to wr ,rd clock width (figure 2) 3v 120 ns 5v t h hold time for db to wr ,rd clock width (figure 2) 3v 120 ns 5v t su1 setup time for cs to wr ,rd clock width (figure 3) 3v 100 ns 5v t h1 hold time for cs to wr ,rd clock width (figure 3) 3v 100 ns 5v HT1670 rev. 1.00 7 september 16, 2003
HT1670 rev. 1.00 8 september 16, 2003 9 # = 7 # = % # = - / 0 > 5 > , figure 1 7 # = , 7 # = - - / 0 , figure 2 ! - 7 # = 7 # = ( 0 0 - / 0 % % ! , , figure 3 functional description system oscillator the HT1670 system clock is used to generate the time base/watchdog timer (wdt) clock frequency, lcd driving clock, and tone frequency. the clock source may be from an on-chip rc oscillator (32khz), a crystal oscillator (32.768khz), or an external 32khz clock by the s/w setting. the configuration of the system oscilla - tor is as shown. after the sys dis command is exe- cuted, the system clock will stop and the lcd bias generator will turn off. that command is available only for the on-chip rc oscillator or for the crystal oscillator. once the system clock stops, the lcd display will be- come blank, and the time base/wdt loses its function as well. the lcd off command is used to turn the lcd bias generator off. after the lcd bias generator switches off by issuing the lcd off command, using the sys dis command reduces power consumption, thus serving as a system power down command. but if the external clock source is chosen as the system clock, using the sys dis command can neither turn the oscillator off nor carry out the power down mode. the crystal oscillator option can be applied to connect an external frequency source of 32khz to the osci pin. in this case, the sys- tem fails to enter the power down mode, similar to the case in the external 32khz clock source operation. at the initial system power on, the HT1670 is at the sys dis state. ! " ! $ 3 4 ' : ? @ & a 0 ! $ 3 0 ? @ b $ 3 0 ? @ ! 0 system oscillator configuration
HT1670 rev. 1.00 9 september 16, 2003 display memory ram structure the static display ram is organized into 1024 4 bits and stores the display data. the contents of the ram are directly mapped to the contents of the lcd driver. data in the ram can be accessed by the read, write and read-modify-write commands. the following is a mapping from the ram to the lcd patterns. 00h 08h 10h 18h 20h--------- 3d8h 3e0h 3e8h 3f0h 3f8h com0 bit0 bit0 bit0 bit0 bit0 bit0 com1 bit1 bit1 bit1 bit1 bit1 bit1 com2 bit2 bit2 bit2 bit2 bit2 bit2 com3 bit3 bit3 bit3 bit3 bit3 bit3 01h 09h 11h 19h 21h--------- 3d9h 3e1h 3e9h 3f1h 3f9h com4 bit0 bit0 bit0 bit0 bit0 bit0 com5 bit1 bit1 bit1 bit1 bit1 bit1 com6 bit2 bit2 bit2 bit2 bit2 bit2 com7 bit3 bit3 bit3 bit3 bit3 bit3 02h 0ah 12h 1ah 22h--------- 3dah 3e2h 3eah 3f2h 3fah com8 bit0 bit0 bit0 bit0 bit0 bit0 com9 bit1 bit1 bit1 bit1 bit1 bit1 com10 bit2 bit2 bit2 bit2 bit2 bit2 com11 bit3 bit3 bit3 bit3 bit3 bit3 03h 0bh 13h 1bh 23h--------- 3dbh 3e3h 3ebh 3f3h 3fbh com12 bit0 bit0 bit0 bit0 bit0 bit0 com13 bit1 bit1 bit1 bit1 bit1 bit1 com14 bit2 bit2 bit2 bit2 bit2 bit2 com15 bit3 bit3 bit3 bit3 bit3 bit3 04h 0ch 14h 1ch 24h--------- 3dch 3e4h 3ech 3f4h 3fch com16 bit0 bit0 bit0 bit0 bit0 bit0 com17 bit1 bit1 bit1 bit1 bit1 bit1 com18 bit2 bit2 bit2 bit2 bit2 bit2 com19 bit3 bit3 bit3 bit3 bit3 bit3 05h 0dh 15h 1dh 25h--------- 3ddh 3e5h 3edh 3f5h 3fdh com20 bit0 bit0 bit0 bit0 bit0 bit0 com21 bit1 bit1 bit1 bit1 bit1 bit1 com22 bit2 bit2 bit2 bit2 bit2 bit2 com23 bit3 bit3 bit3 bit3 bit3 bit3 06h 0eh 16h 1eh 26h--------- 3deh 3e6h 3eeh 3f6h 3feh com24 bit0 bit0 bit0 bit0 bit0 bit0 com25 bit1 bit1 bit1 bit1 bit1 bit1 com26 bit2 bit2 bit2 bit2 bit2 bit2 com27 bit3 bit3 bit3 bit3 bit3 bit3 07h 0fh 17h 1fh 27h--------- 3dfh 3e7h 3efh 3f7h 3ffh com28 bit0 bit0 bit0 bit0 bit0 bit0 com29 bit1 bit1 bit1 bit1 bit1 bit1 com30 bit2 bit2 bit2 bit2 bit2 bit2 com31 bit3 bit3 bit3 bit3 bit3 bit3 seg0 seg1 seg2 seg3 seg124 seg125 seg126 seg127 128 32 selection mode ram mapping table
HT1670 rev. 1.00 10 september 16, 2003 00h 04h 08h 0ch 10h--------- 22ch 230h 234h 238h 23ch com0 bit0 bit0 bit0 bit0 bit0 bit0 com1 bit1 bit1 bit1 bit1 bit1 bit1 com2 bit2 bit2 bit2 bit2 bit2 bit2 com3 bit3 bit3 bit3 bit3 bit3 bit3 01h 05h 09h 0dh 11h--------- 22dh 231h 235h 239h 23dh com4 bit0 bit0 bit0 bit0 bit0 bit0 com5 bit1 bit1 bit1 bit1 bit1 bit1 com6 bit2 bit2 bit2 bit2 bit2 bit2 com7 bit3 bit3 bit3 bit3 bit3 bit3 02h 06h 0ah 0eh 12h--------- 22eh 232h 236h 23ah 23eh com8 bit0 bit0 bit0 bit0 bit0 bit0 com9 bit1 bit1 bit1 bit1 bit1 bit1 com10 bit2 bit2 bit2 bit2 bit2 bit2 com11 bit3 bit3 bit3 bit3 bit3 bit3 03h 07h 0bh 0fh 13h--------- 22fh 233h 237h 23bh 23fh com12 bit0 bit0 bit0 bit0 bit0 bit0 com13 bit1 bit1 bit1 bit1 bit1 bit1 com14 bit2 bit2 bit2 bit2 bit2 bit2 com15 bit3 bit3 bit3 bit3 bit3 bit3 seg0 seg1 seg2 seg3 seg140 seg141 seg142 seg143 144 16 selection mode ram mapping table name command code function 144 16 mode x 100 -0001-1111-xxxx change segment from 144 to 96 and common from 32 to 16 the default value after power on reset is 128 32 mode, set normal command will change 144 16 mode to 128 32 mode. frame frequency HT1670 provides three kinds of frame frequency option by command code; 64hz, 89hz and 170hz respectively. frame 64hz provides 64hz frame frequency. frame 89hz provides 89hz frame frequency. frame 170hz provides 170hz frame frequency. name command code function frame 170hz x 100 -0001-1000-xxxx select 170hz frame frequency frame 89hz x 100 -0001-1101-xxxx select 89hz frame frequency frame 64hz x 100 -0001-1110-xxxx select 64hz frame frequency frame frequency selection command code time base and watchdog timer wdt the time base generator and wdt share the same counter which is divided by 256. the irq clock can be programmed as 1hz, 2hz, ...., 128hz output. timer dis/en/clr, wdt dis/en/clr and irq en/dis are independent from each other. once the wdt time-out occurs, the irq pin will remain at a logic low level until the clr wdt or the irq dis command is issued. if an external clock is selected as the system frequency source, the sys dis command turns out invalid and the power down mode fails to be carried out until the external clock source is removed.
HT1670 rev. 1.00 11 september 16, 2003 buzzer tone output a simple tone generator is implemented in the HT1670. the tone generator can output a pair of differential driv - ing signals on the bz and bz which are used to generate a single tone. by executing the tone 4k and tone 2k commands there are two tone frequency outputs selectable that can turn on the tone output. the tone 4k and tone 2k commands set the tone frequency to 4khz and 2khz, re - spectively. the tone output can be turned off by invoking the tone off command. the tone outputs, namely bz and bz , are a pair of differential driving outputs used to drive a piezo buzzer. once the system is disabled or the tone output is inhibited, the bz and the bz outputs will remain at low level. command format the HT1670 can be configured by software setting. there are two mode commands to configure the HT1670 resource and to transfer the lcd display data. the configuration mode of the HT1670 is called com - mand mode, and its command mode id is 100. the command mode consists of a system configuration command, a system frequency selection command, an lcd configuration command, a tone frequency selec - tion command, a bias current selection command, a timer/wdt setting command, and an operating com - mand. the data mode, on the other hand, includes read, write, and read-modify-write opera - tions. the following are the data mode id and the command mode id: operation mode id read data 110 write data 101 read-modify-write data 101 command command 100 if successive commands have been issued, the com - mand mode id can be omitted. while the system is op - erating in the non-successive command or the non-successive address data mode, the cs pin should be set to 1 and the previous operation mode will also be reset. the cs pin returns to 0 , so a new operation mode id should be issued first.
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" & & - " ! time base and wdt configurations name command code function tone off x100 -0000-1000-xxxx turn-off tone output tone 4k x100 -0001-0000-xxxx turn-on tone output, tone frequency is 4khz tone 2k x100 -0001-0001-xxxx turn-on tone output, tone frequency is 2khz buzzer tone output command code the following are the data mode id and the command id: operation mode id read data 110 write data 101 read-modify-write data 101 command command 100 if successive commands have been issued, the command mode id can be omitted. while the system is operating in the non-successive address data mode, the cs pin should be set 1 and the previous operation mode will also be reset. the cs pin returns to 0, so a new operation mode id should be issued first.
HT1670 rev. 1.00 12 september 16, 2003 bias generator the HT1670 bias voltage belongs to internal resistor type. it provides two kinds of bias option named 1/6 bias and 1/5 bias respectively. it also provides three kinds of bias current option by programming to suitably drive an lcd panel. the three kinds of bias current are large, middle, and small, respectively. usually, large panel lcd can be excellently displayed by large bias current. relatively, it consumes large current when lcd on command is used. small bias current provides low power consumption during on condition when the lcd is normally displayed. the following are the reference value table. interfacing only six lines are required to interface with the HT1670. the cs line is used to initialize the serial interface circuit and to terminate the communication between the host controller and the HT1670. if the cs pin is set to 1, the data and command issued between the host controller and the HT1670 are first disabled and then initialized. before issuing a mode command or mode switching, a high level pulse is required to initialize the serial inter - face of the HT1670. the db0~db3 are the 4-bit parallel data input/output lines. data to be read or written or commands to be written have to pass through the db0~db3 lines. the rd line is the read clock input. data in the ram are clocked out on the falling edge of the rd signal, and the clocked out data will then appear on the db0~db3 lines. it is recommended that the host controller read correct data during the interval between the rising edge and the next falling edge of the rd signal. the wr line is the write clock input. the data, ad - dress, and command on the db0~db3 lines are all clocked into the HT1670 on the rising edge of the wr signal. there is an optional irq line to be used as an in - terface between the host controller and the HT1670. the irq pin can be selected as a timer output or a wdt overflow flag output by the s/w setting. the host con - troller can perform the time base or the wdt function by connecting with the irq pin of the HT1670. bias vlcd large bias current middle bias current small bias current 1/5 3v 165 a70 a30 a 5v 270 a 110 a50 a 1/6 3v 140 a55 a25 a 5v 225 a90 a40 a , ! ! , 3 , $ , 8 , % % ' c 6 ,
, 2 6 4 , d , 5 , , , 7 , ' , ! ! , 3 , $ , 8 , % % 7 c 6 , , , , 7 , ' - . internal resistor type bias generator configurations
timing diagrams read mode (command id code :110) write mode (command id code :101) HT1670 rev. 1.00 13 september 16, 2003 $ ! $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ 4 $ $ 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 % ' 3 3 % # % % % % % % % % % % % % % % % % % 7 % % # # # # # # # # # # # # # # # # # 8 # # ; < " ; e % 7 < ; e % 8 < ; e % $ < ; e % 3 < ; e % % < ; e % # < ; e 9 < ; e : < ; e 4 < ; e ' < ; e 7 < ; e 8 < ; e $ < ; e 3 < ; e % < ; < " ; ! < ; ! < f f f : 9 4 $ f f ' 3 % f 7 % % 9 8 # # : ; < ; < ; < ; < $ ! $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ 4 $ $ 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 % ' 3 3 % # % % % % % % % % % % % % % % % % % 7 % % # # # # # # # # # # # # # # # # # 8 # # ; < " ; e % 7 < ; e % 8 < ; e % $ < ; e % 3 < ; e % % < ; e % # < ; e 9 < ; e : < ; e 4 < ; e ' < ; e 7 < ; e 8 < ; e $ < ; e 3 < ; e % < ; < " ; ! < ; ! < f f f : 9 4 $ f f ' 3 % f 7 % % 9 8 # # : ; < ; < ; < ; <
read-modify-write mode (command id code :101) command mode (command id code :100) note: x stands for don t care HT1670 rev. 1.00 14 september 16, 2003 $ ! f f 4 $ 3 % % ' 3 f % # # # 7 % f # # " " ; ! < 8 # f 7 8 $ 3 % ; ! < 4 $ ' 3 7 % 8 # f f f f f f f f 4 $ ' 3 7 % 8 # f f f f f f f f 4 $ ' 3 7 % 8 # f f f f f f f f 4 $ ' 3 7 % 8 # f f f f f f f f 4 $ ' 3 7 % 8 # f f f f f $ ! $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ $ 4 $ $ 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 % ' 3 3 % # % % % % % % % % % % % % % % % % % 7 % % # # # # # # # # # # # # # # # # # 8 # # ; < " ; e 4 < ; e 4 < ; e ' < ; e ' < ; e 7 < ; e 7 < ; e 8 < ; e 8 < ; e $ < ; e $ < ; e 3 < ; e 3 < ; e % < ; e % < ; < ; < " ; ! < ; ! < f f f : 9 4 $ f f ' 3 % f 7 % % 9 8 # # : ; < ; < ; < ; < $ 3 % #
application circuits host controller with an HT1670 display system note: * the connection of irq and rd pin can be selected depending on the mcu. adjust vr to fit lcd display adjust r (external pull-high resistance) to fit user s time base clock. instruction set summary name command code d/c function def. read x110-xxa9a8-a7a6a5a4-a3a2a1a0- d3d2d1d0 d read data from the ram write x101-xxa9a8-a7a6a5a4-a3a2a1a0- d3d2d1d0 d write data to the ram read-modify- write x101-xxa9a8-a7a6a5a4-a3a2a1a0- d3d2d1d0 d read and write data to the ram sys dis x100-0000-0000-xxxx-xxxx c turn off both system oscillator and lcd bias generator yes sys en x100-0000-0001-xxxx-xxxx c turn on system oscillator lcd off x100-0000-0010-xxxx-xxxx c turn off lcd display yes lcd on x100-0000-0011-xxxx-xxxx c turn on lcd display timer dis x100-0000-0100-xxxx-xxxx c disable time base output yes wdt dis x100-0000-0101-xxxx-xxxx c disable wdt time-out flag output yes timer en x100-0000-0110-xxxx-xxxx c enable time base output wdt en x100-0000-0111-xxxx-xxxx c enable wdt time-out flag output tone off x100-0000-1000-xxxx-xxxx c turn off tone outputs yes clr timer x100-0000-1101-xxxx-xxxx c clear the contents of the time base generator clr wdt x100-0000-1111-xxxx-xxxx c clear the contents of the wdt stage tone 4k x100-0001-0000-xxxx-xxxx c turn on tone output, tone frequency output: 4khz HT1670 rev. 1.00 15 september 16, 2003 " + # 1 $ g b ! ! " ! 0 & a 0 % ; $ 3 0 ? @ < & a 0 3 ; $ 3 0 ? @ < ! * * # 1 $ % ! & # 1 ! & % 3 4 g , g , c @ a h 4 , $ 3 4 ' : ? @ g % ' % 7 / % $ 3 % % '
name command code d/c function def. tone 2k x100-0001-0001-xxxx-xxxx c turn on tone output, tone frequency output: 2khz irq dis x100-0001-0010-xxxx-xxxx c disable irq output yes irq en x100-0001-0011-xxxx-xxxx c enable irq output rc 32k x100-0001-0100-xxxx-xxxx c system clock source, on-chip rc oscillator yes ext (x tal) x100-0001-0101-xxxx-xxxx c system clock source, external 32khz clock source or crystal oscillator 32.768khz large bias x100-0001-0110-xxxx-xxxx c large bias current option yes middle bias x100-0001-0111-xxxx-xxxx c middle bias current option small bias x100-0001-1000-xxxx-xxxx c small bias current option bias 1/6 x100-0001-1010-xxxx-xxxx c lcd 1/6 bias option yes bias 1/5 x100-0001-1001-xxxx-xxxx c lcd 1/5 bias option frame 170hz x100-0001-1100-xxxx-xxxx c selects 170hz frame frequency frame 89hz x100-0001-1101-xxxx-xxxx c selects 89hz frame frequency frame 64hz x100-0001-1110-xxxx-xxxx c selects 64hz frame frequency yes select 144 16 x100-0001-1111-xxxx-xxxx c this command will change segment from 96 to 112 and command from 32 to 16 f1 x100-1010-0000-xxxx-xxxx c time base clock output: 1hz the wdt time-out flag after: 4s f2 x100-1010-0001-xxxx-xxxx c time base clock output: 2hz the wdt time-out flag after: 2s f4 x100-1010-0010-xxxx-xxxx c time base clock output: 4hz the wdt time-out flag after: 1s f8 x100-1010-0011-xxxx-xxxx c time base clock output: 8hz the wdt time-out flag after: 1/2s f16 x100-1010-0100-xxxx-xxxx c time base clock output: 16hz the wdt time-out flag after: 1/4s f32 x100-1010-0101-xxxx-xxxx c time base clock output: 32hz the wdt time-out flag after: 1/8s f64 x100-1010-0110-xxxx-xxxx c time base clock output: 96hz the time-out flag after: 1/16s f128 x100-1010-0111-xxxx-xxxx c time base clock output: 128hz the wdt time-out flag after: 1/32s yes test x100-1111-1111-xxxx-xxxx c test mode, user don t use. normal x100-1111-1110-xxxx-xxxx c normal mode, 96 32 mode will be set yes note: x stands for don t care a9~a0: ram address d3~d0: ram data d/c: data/command mode def.: power-on reset default all the bold forms, namely 11 0, 10 1, and 10 0, are mode commands. of these, 10 0 indicates the command mode id. if successive commands have been issued, the command mode id except for the first command will be omitted. the tone frequency source and the time base/wdt clock frequency source can be derived from an on-chip 32khz rc oscillator, a 32.768khz crystal oscillator, or an external 32khz clock. calculation of the fre - quency is based on the system frequency sources as stated above. it is recommended that the host controller should initialize the HT1670 after power-on reset, otherwise, power on reset may fail, which in turn leads to the malfunctioning of the HT1670. HT1670 rev. 1.00 16 september 16, 2003
package information 208-pin qfp (28 28) outline dimensions symbol dimensions in mm min. nom. max. a31 31.40 b 27.90 28.10 c31 31.40 d 27.90 28.10 e 0.50 f 0.20 g 3.10 3.40 h 3.70 i 0.10 j 0.35 0.65 k 0.10 0.20
0 7 HT1670 rev. 1.00 17 september 16, 2003 % 7 4 % 7 ' 3 # : % % # 7 7 3 7 $ % # 8 & ( ? " i >
HT1670 rev. 1.00 18 september 16, 2003 copyright 2003 by holtek semiconductor inc. the information appearing in this data sheet is believed to be accurate at the time of publication. however, holtek as - sumes no responsibility arising from the use of the specifications described. the applications mentioned herein are used solely for the purpose of illustration and holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. holtek s products are not authorized for use as critical components in life support devices or systems. holtek reserves the right to alter its products without prior notification. for the most up-to-date information, please visit our web site at http://www.holtek.com.tw. holtek semiconductor inc. (headquarters) no.3, creation rd. ii, science park, hsinchu, taiwan tel: 886-3-563-1999 fax: 886-3-563-1189 http://www.holtek.com.tw holtek semiconductor inc. (taipei sales office) 4f-2, no. 3-2, yuanqu st., nankang software park, taipei 115, taiwan tel: 886-2-2655-7070 fax: 886-2-2655-7373 fax: 886-2-2655-7383 (international sales hotline) holtek semiconductor inc. (shanghai sales office) 7th floor, building 2, no.889, yi shan rd., shanghai, china 200233 tel: 021-6485-5560 fax: 021-6485-0313 http://www.holtek.com.cn holtek semiconductor inc. (shenzhen sales office) 43f, seg plaza, shen nan zhong road, shenzhen, china 518031 tel: 0755-8346-5589 fax: 0755-8346-5590 isdn: 0755-8346-5591 holtek semiconductor inc. (beijing sales office) suite 1721, jinyu tower, a129 west xuan wu men street, xicheng district, beijing, china 100031 tel: 010-6641-0030, 6641-7751, 6641-7752 fax: 010-6641-0125 holmate semiconductor, inc. (north america sales office) 46712 fremont blvd., fremont, ca 94538 tel: 510-252-9880 fax: 510-252-9885 http://www.holmate.com

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